| 139-AP637 |
Hardware Synthesis of Recursive Functions through Partial Stream Rewriting |
| 139-AS546 |
Explicit Modeling of Control and Data for Improved NoC Router Estimation |
| 139-BF359 |
Joint Management of RAM and Flash Memory with Access Pattern Considerations |
| 139-BG81 |
Static Dataflow with Access Patterns: Semantics and Analysis |
| 139-BH339 |
Software Controlled Cell Bit-Density to improve NAND Flash Lifetime |
| 139-BN275 |
A Hybrid And Adaptive Model for Predicting Register File And SRAM Power Using a Reference Design |
| 139-CB513 |
ComPLx: A Competitive Primal-dual Lagrange Optimization for Global Placement |
| 139-CM593 |
Networked Architecture for Hybrid Electrical Energy Storage Systems |
| 139-CO989 |
Accurate Process-Hotspot Detection Using Critical Design Rule Extraction |
| 139-CP429 |
Heterogeneous Multi-Channel: Fine-Grained DRAM Control for Both System Performance and Power Efficiency |
| 139-CP599 |
Meta-Cure: A Reliability Enhancement Strategy for Metadata in NAND Flash Memory Storage Systems |
| 139-CT975 |
mLogic: Ultra-Low Voltage Non-Volatile Logic Circuits Using STT-MTJ Devices |
| 139-CZ156 |
Clock Tree Synthesis with Methodology of Re-use in 3D IC |
| 139-DH241 |
A Hybrid NoC Design for Cache Coherence Optimization for Chip Multiprocessors |
| 139-DK600 |
Cost-Effective Power Delivery for Supporting Per-Core Voltage Domains for Power-Constrained Processors |
| 139-DT139 |
Cache Revive: Architecting Volatile STT-RAM Caches for Enhanced Performance |
| 139-DX707 |
Recovery Based Design for Variation-tolerant SoCs |
| 139-DZ37 |
Path Directed Abstraction and Refinement in SAT-based Design Debugging |
| 139-EE588 |
Metronome: Operating System Level Performance Management via Self-Adaptive Computing |
| 139-EE627 |
BLAST: Efficient Computation of Nonlinear Delay Sensitivities in Electronic and Biological
Networks using Barycentric Lagrange enabled Transient Adjoint Analysis |
| 139-EG602 |
Physics Matters: Statistical Aging Prediction under Trapping/Detrapping |
| 139-EJ620 |
Constructing Large and Fast Multi-level Cell STT-MRAM based Cache for Embedded Processor |
| 139-EJ930 |
High radix self-arbitrating switch fabric with multiple arbitration policies and quality of service |
| 139-EM314 |
TSV Open Defects in 3D Integrated Circuits: Characterization, Test, and Optimal Spare Allocation |
| 139-EP183 |
Design of Pin-Constrained General-Purpose Digital Microfluidic Biochips |
| 139-EZ439 |
Exploiting Narrow-width Values for Process Variation-tolerant 3D Microprocessors |
| 139-FA195 |
Conforming the Runtime Inputs for Hard Real-Time Embedded Systems |
| 139-FB325 |
Improving Gate-level Simulation Accuracy when Unknowns Exist |
| 139-FD106 |
CrowdMine: Towards Crowdsourced Human-Assisted Verification |
| 139-FE236 |
Compiling for Energy Ef?ciency on Timing Speculative Processors |
| 139-FG858 |
Path Scheduling on Digital Microfluidic Biochips |
| 139-FL811 |
A Hybrid Approach to Cyber-Physical Systems Verification |
| 139-FN171 |
Embedding Statistical Tests for on-chip Dynamic Voltage and Temperature Monitoring |
| 139-FO233 |
Worst-Case Execution Time Analysis for Parallel Run-Time Monitoring on Real-Time Systems |
| 139-FR40 |
Invariance-based Concurrent Error Detection for Advanced Encryption Standard |
| 139-FR46 |
Point and Discard: A Hard-Error-Tolerant Architecture for Non-Volatile Last Level Caches |
| 139-FW908 |
Regaining Throughput Using Completion Detection for Error-Resilient, Near-Threshold Logic |
| 139-FZ387 |
Towards Fault-Tolerant Embedded Systems with Imperfect Fault Detection |
| 139-GA588 |
Architecture Support for Accelerator-Rich CMPs |
| 139-GC307 |
Quality-retaining OLED Dynamic Voltage Scaling for Video Streaming Applications on Mobile Devices |
| 139-GC56 |
Efficient Multi-objective Synthesis for Microwave Components Based on Computational Intelligence Techniques |
| 139-GI940 |
Towards Efficient SPICE-Accurate Nonlinear Circuit Simulation with On-the-Fly Support-Circuit Preconditioners |
| 139-GJ52 |
A Semiemperical Model for Wakeup Time Estimation in Power-Gated Logic Clusters |
| 139-GO224 |
On The Asymptotic Costs of Multiplexer-based Reconfigurability |
| 139-GP863 |
Extracting Design Information from Natural Language Specifications |
| 139-GQ362 |
Can Pin Access Limit the Footprint Scaling? |
| 139-GT594 |
Statistical Design and Optimization for Adaptive Post-silicon Tuning of MEMS Filters |
| 139-GT718 |
Synchronization for Hybrid MPSoC Full-System Simulation |
| 139-GV588 |
AMOR: An Efficient Aggregating Based Model Order Reduction Method for Many-Terminal Interconnect Circuits |
| 139-GY119 |
Chisel: Constructing Hardware in a Scala Embedded Language |
| 139-GY761 |
Executing Synchronous Dataflow Graphs on a SPM-based Multi-core Architecture |
| 139-HA221 |
Goal-Oriented Test Generation for Analog Circuits |
| 139-HG502 |
Optimizing Energy Efficiency of 3D Multicore Systems with Stacked DRAM under Thermal Constraints |
| 139-HJ785 |
Observational Wear Leveling: An Efficient Algorithm for Flash Memory Management |
| 139-HL48 |
Quick Detection of Difficult Bugs for Effective Post-Silicon Validation |
| 139-HQ321 |
A Code Morphing Methodology to Automate Power Analysis Countermeasures |
| 139-HX199 |
Symbolic Model Checking on SystemC Designs |
| 139-IA877 |
Unrolling and Retiming of Stream Applications onto Embedded Multicore Processors |
| 139-IO306 |
HaVOC: A Hybrid-Memory-aware Virtualization Layer for On-Chip Distributed ScratchPad and Non-Volatile Memories |
| 139-IP637 |
Hardware Realization of Neuromorphic BSB model with memristor crossbar network |
| 139-IY80 |
An Information-theoretic Framework for Optimal Temperature Sensor Allocation and Full-chip Thermal Monitoring |
| 139-JF660 |
Generalized SAT-Sweeping for Post-Mapping Optimization |
| 139-JP915 |
Obstacle-Avoiding Free-assignment Routing for Flip-Chip Designs |
| 139-JQ597 |
Reversible Statistical max/min Operation: Concept and Applications to Timing |
| 139-JR640 |
Exploiting Die-to-Die Thermal Coupling in 3D IC Placement |
| 139-JX99 |
Reliable Computing with Ultra-Reduced Instruction Set Co-processors |
| 139-KB553 |
Removing Overhead From High Level Interfaces |
| 139-KC582 |
A New Uncertainty Budgeting Based Method for Robust Analog/Mixed-Signal Design |
| 139-KG51 |
Making Non-Volatile Nanomagnet Logic Non-Volatile |
| 139-KN885 |
Optimizing Memory Hierarchy Allocation with Loop Transformations for High-Level Synthesis |
| 139-KY974 |
SALSA: Systematic Logic Synthesis of Approximate Circuits |
| 139-LC251 |
PADE: A High-Performance Mixed-Size Placer with Automatic Datapath Extraction and Evaluation through High-Dimensional Data Learning |
| 139-LE795 |
Attackboard: Representing and Generating Dependency-aware Traces with a Novel Table-driven Design for On-Chip Networks Evaluations |
| 139-LO763 |
A Non-Intrusive Timing Synchronization Interface for Hardware-Assisted HW/SW Co-Simulation |
| 139-LP151 |
An Efficient Algorithm for Multi-Layer Obstacle-Avoiding Rectilinear Steiner Tree Construction |
| 139-LP189 |
Specification and Synthesis of Hardware Checkpointing and Rollback Mechanisms |
| 139-LU446 |
Realizing Reversible Circuits Using a New Class of Quantum Gates |
| 139-LX72 |
Simultaneous Flare Level and Flare Variation Minimization with Dummification in EUVL |
| 139-MB958 |
Nano-Magnets and Metals Put to Neurmorphic Computation Can Relax the Burden on CMOS |
| 139-MC576 |
Boolean Satisfiability Using Noise-based Logic |
| 139-MG176 |
Non-uniform Multilevel Analog Routing with Matching Constraints |
| 139-MO476 |
ON THE EXPLOITATION OF THE INHERENT ERROR RESILIENCE OF WIRELESS SYSTEMS UNDER UNRELIABLE SILICON |
| 139-MO558 |
Exploiting Spatiotemporal and Device Contexts for Energy-Efficient Mobile Embedded Systems |
| 139-MZ807 |
The New Formal: Integrated Induction and Deduction |
| 139-ND190 |
Checking architectural outputs instruction-by-instruction on acceleration platforms |
| 139-NE836 |
Coding-based Energy Minimization for Phase Change Memory |
| 139-NF163 |
Hybrid DRAM/PRAM-based Main Memory for Single-Chip CPU/GPU |
| 139-NU948 |
Improved Tangent Space Based Distance Metric for Accurate Lithographic Hotspot Classification |
| 139-NW827 |
Courteous Cache Sharing: Being Nice to Others in Capacity Management |
| 139-NW899 |
Identification of Recovered ICs using Fingerprints from a Light-Weight On-Chip Sensor |
| 139-OI489 |
Cost-Efficient Buffer Sizing in Shared-Memory 3D-MPSoCs using Wide I/O Interfaces |
| 139-OJ228 |
Steady-State Dynamic Temperature Analysis and Reliability Optimization for Embedded Multiprocessor Systems |
| 139-OK931 |
Standard Cell Sizing for Subthreshold Operation |
| 139-OZ879 |
A Methodology for Energy-Quality Tradeoff Using Imprecise Hardware |
| 139-PD786 |
Traffic-aware Power Optimization for Network Applications on Multicore Servers |
| 139-PN642 |
System-level Synthesis of Memory Architecture for Stream Processing Sub-Systems of a MPSoC |
| 139-PR517 |
EPIMap: Using Epimorphism to Map Applications on CGRAs |
| 139-PR911 |
Considering Diagnosis Functionality during Automatic System-Level Design of Automotive Networks |
| 139-PU589 |
Write Performance Improvement by Hiding R Drift Latency in Phase-Change RAM |
| 139-QA803 |
Fast Nonlinear Model Order Reduction via Associated Transforms of High-Order Volterra Transfer Functions |
| 139-QE784 |
Real-Time Length-based Contention Management for STM |
| 139-QG562 |
Standard Cell Routing via Boolean Satisfiability |
| 139-QL972 |
On Improving the Uniqueness of Silicon-Based Physically Unclonable Functions Via Optical Proximity Correction |
| 139-QQ104 |
Reliable State Transition Detection in Off-the-Shelf Low Frequency Electric Meters for Cyber-Physical Systems |
| 139-QS63 |
Accuracy-Configurable Adder for Approximate Arithmetic Designs |
| 139-RI171 |
Instruction Scheduling for Reliability-Aware Compilation |
| 139-RM681 |
SAGA: SystemC Acceleration on GPU Architectures |
| 139-RT192 |
Yield Estimation via Multi-Cones |
| 139-RZ167 |
Alternate Hammering Test for Application-Specific DRAMs and an Industrial Case Study |
| 139-SC972 |
PowerField: A Transient Temperature-to-Power Technique based on Markov Random Field Theory |
| 139-SI442 |
Physical Synthesis onto a Sea-of-Tiles with Double-Gate Silicon Nanowire Transistors |
| 139-SI760 |
CMOS Material Implication: a New Kind of Logic |
| 139-SI827 |
Efficient extraction of LTPS-TFT backplane non-uniformity in active-matrix OLED displays |
| 139-SQ672 |
Efficient Trimmed-sample Monte Carlo Methodology and Yield-aware Design Flow for Analog Circuits |
| 139-SW925 |
Chip/Package Co-Analysis of Thermo-Mechanical Stress and Reliability in TSV-based 3D ICs |
| 139-TT728 |
A Novel Layout Decomposition Algorithm for Triple Patterning Lithography |
| 139-TW104 |
Functional Timing Analysis Made Fast and General |
| 139-TY312 |
Communication-Aware Mapping of KPN Applications onto Heterogeneous MPSoCs |
| 139-UC672 |
Exploring sub-20nm FinFET design with Predictive Technology Models. |
| 139-UC688 |
Predicting Timing Violations Through Instruction Level Path Sensitization Analysis |
| 139-UD625 |
Layout-Friendly Structural Exploration in High-Level Synthesis |
| 139-UI395 |
A QoS-Aware Memory Controller for Dynamically Balancing GPU and CPU Bandwidth Use in an MPSoC |
| 139-UL519 |
Sparse LU Factorization for Parallel Circuit Simulation on GPU |
| 139-UP953 |
GLARE: The Global and Local Wiring Aware Routability Evaluation Method |
| 139-VA24 |
Equivalence Checking for Behaviorally Synthesized Pipelines |
| 139-VD289 |
WCET-Centric Partial Instruction Cache Locking |
| 139-VE982 |
Structure-Aware Placement for Datapath Intensive Circuit Designs |
| 139-VG168 |
Small Delay Testing for TSVs in 3D ICs |
| 139-VG207 |
Transformer: An Extensible, Fast and Cycle-Accurate Full-system Multi-core Simulator |
| 139-VM160 |
Optimal Thermal Characterization and Minimal Sensor Placement for Multicore Processors Using Eigenmaps |
| 139-VO262 |
Library-Aware Resonant Clock Synthesis (LARCS) |
| 139-VU323 |
Test Data Volume Optimization for Diagnosis |
| 139-VY248 |
DAE2FSM: A New Paradigm for Automatically Deriving Accurate Discrete-Time Abstractions of Continuous Dynamical Systems |
| 139-VY660 |
Age-Based PCM Wear Leveling with Nearly Zero Search Cost |
| 139-WG583 |
Hardware Trojan Horse Benchmark via Optimal Creation and Placement of Malicious Circuitry |
| 139-WG649 |
Triple Patterning Aware Routing and Its Comparison with Double Patterning Aware Routing in 14nm Technology |
| 139-WI309 |
PS3-RAM: A Fast, Portable and Scalable Statistical STT-RAM Reliability Analysis Method |
| 139-WJ89 |
System Verification of Concurrent RTL Modules by Compositional Path Predicate Abstraction |
| 139-WR177 |
Variability-Aware, Discrete Optimization for Analog Circuits |
| 139-WR367 |
X-Tracer: A Reconfigurable X-Tolerant Trace Compressor for Silicon Debug |
| 139-WR601 |
TSVs as capacitive elements for neuromorphic systems |
| 139-WW441 |
Security Analysis of Logic Obfuscation |
| 139-XE404 |
Run-Time Power-Down Strategies for Real-Time SDRAM Memory Controllers |
| 139-XI771 |
Energy-efficient Cache Design using STT-MRAM |
| 139-XM989 |
Process Variation in Near-Threshold Wide SIMD Architecture |
| 139-XN518 |
A Chip-Package-Board Co-Design Methodology |
| 139-XR112 |
A Neural-Controlled Cyber Physical System for Intent Recognition for Aritificial Legs |
| 139-XR576 |
Privacy Preserving Integer Programming for Global Routing |
| 139-XU790 |
Analysis of DC Current Crowding in Through-Silicon-Vias and Its Impact on Power Integrity in 3D ICs |
| 139-YA519 |
Timing ECO Optimization Using Metal-Configurable Gate-Array Spare Cells |
| 139-YA524 |
Near-Optimal, Dynamic Module Reconfiguration in a Photovoltaic System to Combat Partial Shading Effects |
| 139-YC419 |
An aging aware adaptive routing algorithm for NoCs |
| 139-YC578 |
Proving Correctness of Regular Expression Accelerators |
| 139-YF754 |
Timing analysis with nonseparable statistical and deterministic variations |
| 139-YJ21 |
Approaching the Theoretical Limits of a Mesh NoC with a 16-Node Chip Prototype in 45nm SOI |
| 139-YK859 |
GDRouter: Interleaved Global Routing and Detailed Routing for Ultimate Routability |
| 139-ZE763 |
Adaptive Power Management of On-Chip Video Memory for Multiview Video Coding |
| 139-ZI741 |
Computer Generation of Streaming Sorting Networks |
| 139-ZL581 |
Automated Feature Localization for Hardware Designs using Coverage Metrics |
| 139-ZR634 |
Incremental Power Grid Verification |
| 139-ZT414 |
Early prediction of NBTI effects using RTL source code analysis |
| 139-ZU829 |
Decoupling Capacitor Design Strategy for Minimizing Supply Noise of Ultra Low Voltage Circuits |