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ESS Research Manuscripts

Embedded Systems and Software topics at DAC 2012 were a huge hit, resulting in more than 33% of the conference’s technical content focused on ESS.

Authors of research manuscripts on all aspects of Embedded Systems and Software are encouraged to submit from the topic category list below. Authors may choose a second submission category (both from the EDA research topics as well as from the focus embedded topics) to accommodate cross-cutting contributions. All Embedded Systems and Software manuscript submissions must adhere to the same rules outlined for the EDA research manuscripts.

SUBMISSION FORMAT

Stage one (Abstract Submission), a title, abstract, and a list of all co-authors must be submitted by November 27. You may also submit the manuscript at this time if ready
Stage two (Manuscript Submission), the paper itself is submitted by December 3

Authors are responsible for ensuring that their manuscript meets the following guidelines. There will be no resubmissions to correct any issues.

All EDA manuscript will be reviewed as finished manuscripts. Preliminary submissions will be at a disadvantage.

SUBMISSION RULES (Abstract & Manuscript)

Submitter must enter the names, affiliations, city, state country and email address of ALL co-authors.
The abstract of approximately 100 words must clearly state the significant contribution, impact, and results of the manuscript
The manuscript must be in PDF format only and be a readable file
The total page count is 10, a self-contained manuscript that is six (6) pages maximum in length and up to four (4) pages of supplemental material. If you choose to submit a manuscript and supplemental material, please submit only one file. Your manuscript and supplemental material will be published in the Conference Proceedings.
DO NOT identify the author(s) by their name(s) or affiliation(s) anywhere on the manuscript or abstract, with all references to the author(s)'s own previous work or affiliations in the bibliographic citations being in the third person
Double-columned, 9-pt or 10-pt font
The addition of new co-authors will not be permitted after November 27

REVIEW PROCESS

DAC manuscripts go through a double-blind review process; i.e., the identity of authors and reviewers is only known to the TPC co-chairs.
DAC ensures that there are no conflicts of interest between authors and reviewers.
DAC will compare each submission against a vast database and any manuscript with significant similarity to previously published works or with manuscripts that are simultaneously under review with other venues with archival publications (e.g., conferences, symposia, journals, and workshops with archival proceedings)
Duplicate submissions will be rejected. Furthermore, DAC will notify the technical chair of the venue where the duplicate was submitted.

SUBMISSION CATEGORIES:

Electronic Design Automation (EDA)

SUBMISSION CATEGORIES FOR EDA PAPERS
Authors of research papers are required to specify a category from the list below. Authors of submissions that cover cross-cutting topics (e.g. low-power, reliability, 3-D, etc.) should select a category that is closest to the essential contribution of the submission. Authors may choose a second submission category to accommodate cross-cutting contributions. Please note the separate categories for embedded systems and software topics.

EDA1. System-Level Design & Codesign
EDA1.1 System specification, modeling, analysis, simulation, verification, and performance analysis
EDA1.2 Scheduling, HW/SW partitioning, HW/SW interface synthesis
EDA1.3 IP and platform-based design
EDA1.4 Security and IP protection
EDA1.5 Design of Multiprocessor System-On-Chip (MPSOC) and case studies
EDA1.6 Application-specific processor design tools

EDA2. System-Level Communication and Networks-on-Chip
EDA2.1 Modeling and performance analysis
EDA2.2 Communications-based design, communication and network synthesis
EDA2.3 Optimization for energy, fault tolerance, reliability
EDA2.4 Interfacing and software issues, beyond-the-die communication
EDA2.5 NoC design methodologies, case studies and prototyping

EDA3. Power Analysis and Low-Power Design
EDA3.1 System-level power design and thermal management
EDA3.2 System/Architectural low-power techniques: partitioning, scheduling, and resource management
EDA3.3 High-level power estimation and optimization
EDA3.4 Gate-level power analysis and optimization
EDA3.5 Device and circuit techniques for low-power design
EDA3.6 Power-aware and energy-efficient wireless protocols, algorithms and design techniques

EDA4. Verification
EDA4.1 Functional, transaction-level, RTL, and gate-level modeling and verification of hardware design
EDA4.2 Dynamic simulation, equivalence checking, formal (and semiformal) verification model and property checking
EDA4.3 Emulation and hardware simulators or accelerator engines
EDA4.4 Modeling languages and related formalisms, verification plan development and implementation
EDA4.5 Assertion-based verification, coverage analysis, constrained random testbench generation

EDA5. High-Level Synthesis, Logic Synthesis, and FPGAs
EDA5.1 Combinational, sequential and asynchronous logic synthesis
EDA5.2 Library mapping, cell-based design and optimization
EDA5.3 Interactions between logic design and layout or physical synthesis
EDA5.4 High-level, behavioral, algorithmic, and architectural synthesis, "C" to gates tools and methods
EDA5.5 Resource scheduling, allocation, and synthesis
EDA5.6 Logic synthesis and physical design techniques for FPGAs
EDA5.7 Configurable and reconfigurable computing

EDA6. Analog Design and Simulation
EDA6.1 Analog, mixed-signal, and RF design methodologies
EDA6.2 Automated synthesis and optimization of analog designs
EDA6.3 Analog, mixed-signal, and RF simulation
EDA6.4 High-frequency and electromagnetic simulation
EDA6.5 Model order reduction techniques for analog/RF designs
EDA6.6 Substrate noise simulation for analog/RF designs

EDA7. Physical Design and Design Closure
EDA7.1 Floorplanning, partitioning, placement
EDA7.2 Buffer insertion and interconnect planning
EDA7.3 Routing and congestion analysis
EDA7.4 Transistor and gate sizing, local physical synthesis
EDA7.5 Clock network synthesis
EDA7.6 Physical verification and design rule checking
EDA7.7 Physical design of 3-D integrated circuits
EDA7.8 Reticle enhancement, lithography-related design optimizations

EDA8. Analysis of Digital Design
EDA8.1 Deterministic and statistical timing analysis
EDA8.2 Electrical simulation, delay modeling and library characterization
EDA8.3 Electrical and thermal reliability, electrical-thermal simulation
EDA8.4 Power delivery analysis and reduction
EDA8.5 Signal integrity and crosstalk modeling
EDA8.6 Process technology characterization, BEOL extraction, and modeling
EDA8.7 Timing and signal/power integrity analysis of 3-D ICs
EDA8.8 Novel clocking methodologies

EDA9. Test and Reliability
EDA9.1 Test quality/reliability, current based test, delay test, low-power test
EDA9.2 Digital fault modeling, ATPG, DFT, BIST, compression
EDA9.3 Memory / FPGA test and repair
EDA9.4 Fault-tolerance and online testing
EDA9.5 Analog/mixed-signal/RF testing
EDA9.6 Board- and system-level test, system-on-chip (SOC) testing
EDA9.7 Silicon debug and diagnosis, post-silicon design validation
EDA9.8 Soft errors
EDA9.9 Design for resilience under manufacturing variations
EDA9.10 Design for manufacturability, yield, defect tolerance, cost issues, and DFM impact
EDA9.11 Testing of 3-D ICs

EDA10. New and Emerging Design Technologies (including but not restricted to)
EDA10.1 New transistor structures, devices, and novel process technologies
EDA10.2 Nanotechnologies, nanowires, nanotubes
EDA10.3 Optical devices and communication
EDA10.4 Quantum computing
EDA10.5 Biologically-based or biologically-inspired computing systems
EDA10.6 MEMS, sensors, actuators, imaging devices
EDA10.7 Design Automation for System & Synthetic Biology

EDA11. Electronic Design Automation (EDA) Wild and Crazy Ideas (WACI)

Embedded Systems and Software (ESS)

ESS1. Embedded System Specification and Embedded Software
ESS1.1 Embedded systems specification methodologies
ESS1.2 Model- and component-based embedded software design
ESS1.3 Embedded software verification
ESS1.4 Operating systems for embedded systems, middleware and virtual machines
ESS1.5 OS Runtime support for resources management
ESS1.6 Software techniques for multicore, GPU, multithreaded embedded architectures
ESS1.7 Compilation strategies, code transformation and parallelization techniques for embedded systems
ESS1.8 Static and dynamic timing analysis for embedded systems
ESS1.9. Hardware-dependent software
ESS1.10 Customized interfaces and protocols
ESS1.11 I/O management in embedded systems: device drivers, timers, etc.

ESS2. Architectures for Embedded Systems
ESS2.1 Many- and multi-core embedded architectures
ESS2.2 Application-specific platforms and embedded processors (ASIP) design
ESS2.3. Design of heterogeneous distributed embedded systems including wireless sensor networks
ESS2.4 Run-time and design time reconfigurable platforms and processors
ESS2.5 Architectures for self-adaptive computing systems
ESS2.6 On-chip memory architectures and management: scratchpads, compiler controlled memories, etc.
ESS2.7 Custom storage organizations: flash, etc.
ESS2.8 Cyberphysical systems: design, analysis and optimization of networked control and switched control systems, architectures, case studies

ESS3. Embedded System Validation, Verification, Security, Dependability
ESS3.1 Formal verification, validation and testing of embedded systems
ESS3.2 Hardware/software co-validation
ESS3.3 Hardware and software security techniques
ESS3.4 Dependable and safety-critical embedded systems: design and case studies

ESS4. Embedded Systems Design Methodologies
ESS4.1 Modeling embedded constraints: performance, reliability, power, security, etc.
ESS4.2 Early estimation and co-simulation of embedded systems designs
ESS4.3 Multiple-constraint-driven embedded system design exploration, synthesis and optimization
ESS4.4 Design methodologies for pervasive distributed networked embedded systems
ESS4.5 Design methodologies for runtime reconfiguration management, self-adaptive systems and autonomous embedded systems
ESS4.6 System level power management and optimization in embedded systems

ESS5. Embedded Systems and Software (ESS) Wild and Crazy Ideas (WACI)

Q. What is the submission process?

A. Authors are asked to submit their work in two stages. In stage one (Abstract Submission), a title, abstract, and a list of all co-authors must be submitted via the DAC web submission site. In stage two (Manuscript Submission), the manuscript itself is submitted. Authors are responsible for ensuring that their manuscript submission meets all guidelines, and that the PDF is readable. To ensure fairness for all submitters, there will be no grace periods to fix problematic submissions.

Authors are to submit a 6 page manuscript and up to 4 pages of supplemental material (similar in concept to appendices) that may include derivations, formal proofs, extensive experimental findings, commentary, traps for the wary, and/or detailed examples. The manuscript should stand on its own, with references in the last page of the 6-pages manuscript. Each section (numbered S1, S2, etc...) within the supplementary material should clarify or expand on a concept already discussed in the 6-page manuscript. The four pages are supplemental - for the benefit of the reader.

Manuscripts without the supplementary material will not be penalized during the review process.

Q. What is the DAC research submission timeline?

A. TIMELINE:

October 11	Abstract submission site OPENS
November 27	Abstract deadline: 5:00pm MT (-07:00 GMT)
December 3	Final manuscripts deadline: 5:00pm MT (-07:00 GMT)
January 17 - 23	Author clarification
February 4	A list of accepted manuscripts is posted on the website
February 14	Accept/Reject notification
March 18	Speaker registration and Copyright form deadline.
March 28	Final manuscript is DUE to the proceedings publisher by 5:00pm MT (-07:00 GMT).
May 7	Draft speaker presentation slides deadline
May 17	Receive feedback on speaker slides from Session Chair
May 21	Speaker bios are DUE to the DAC Navigation Center
June 2	The Design Automation Conference begins!

Q. How do the research manuscripts get selected?

A. The DAC Technical Program Committee (TPC) determines the selection of research manuscripts to be included in the DAC program, as well as their composition into technical sessions within the conference schedule. The Technical Program Committee is organized into a set of subcommittees which focus on the various topic areas involved in design and design automation. These are reasonably close, but not necessarily identical to the categories in the call for contributions. Manuscripts which are assigned by authors to the wrong categories may be reassigned by the program committee chairs and subcommittee chairs to the subcommittee best able to review them. The Technical Program Committee Co-Chairs may also move manuscripts in order to resolve conflicts of interest with subcommittee members.

Each subcommittee will select the best manuscripts submitted with limits determined by the overall numbers of submissions, the capacity of the DAC schedule, and the number of manuscripts in each area. In recent years, acceptance rates for DAC manuscripts have been about 23% - for example, in 2012, 162 manuscripts were accepted from 741 submissions, a 22% acceptance rate.

The Technical Program Committee and its subcommittees will look at the following in selecting manuscripts:

Quality of the technical contribution (design, method, research) described in the manuscript.
Originality of the concepts used and described (whether tools, methods or design). Advances over previous approaches should be reflected in by describing the significant improvement in results section. Comparisons with other approaches are also important to justify the advancement claimed in your manuscript.
Significance of the results obtained - by measurable quantitative criteria (runtime for tools, optimality of results, time for design process steps, simplification or automation of manual effort, etc.).
Degree of experimental validation of the concepts. Use in real designs or widely accepted benchmarks with measurable criteria for results is highly desirable, if not essential.
A good discussion of limitations of the approach and concepts, and possible areas for future improvement.
The quality of manuscript writing, use of English, organization and clarity of presentation.
The decision to consider the manuscript and topic for a short or long presentation will be based in part on the significance of the work described and the amount of time required to present its content.
Please be aware that the detailed criteria used to judge these manuscripts will differ from research/embedded-systems-and-software manuscripts and User Track papers.

Once a manuscript has been accepted, the subcommittee organizes it into an appropriate theme technical session and these sessions are then scheduled over the duration of the conference.

Q. Which category should I select when I submit my manuscript?

A. The CFC lists several categories; please select the most appropriate one when submitting your abstract. Authors of submissions that cover cross-cutting topics should select a category that is closest to the essential contribution of the submission. Authors may choose a second submission category to accommodate cross-cutting contributions. Please note the separate categories for embedded systems and software topics.

Q. Six pages only? Or, is it ten now?

A. The total page count is 10, a self-contained manuscript that is six (6) pages maximum in length and up to four (4) pages of supplemental material. If you choose to submit a manuscript and supplemental material, please submit only one file. Your manuscript and supplemental material will be published in the Conference Proceedings.

All DAC research manuscripts are judged on the basis of the 6-page manuscript that has been submitted for review. Each manuscript has a maximum of six, two-column pages and must be structured in the typical way for a conference manuscript. The manuscript should include a title, space for authors (but do not actually list the authors), abstract, categories and keywords, introduction, background (including comparison with other approaches), detailed description of concepts, experimental results, conclusions and references. Previous DAC proceedings contain numerous examples of research manuscripts and can be consulted for reference.

The four-page supplementary material sections will serve to increase the understanding and readability of the manuscript by providing additional content. The supplementary material is not intended for the introduction of new material or new concepts. The quality of the supplemental material should be on par with the manuscript itself in terms of English use, quality of figures, and formatting. Members of the Technical Program Committee will rely on your six-page submission, and will not penalize you for the lack of supplementary material.

Q. How do I avoid referencing my own work to ensure the integrity of the blind review process?

A. To satisfy the criteria for a blind review process, the Call for Contributions states that any references to the author(s) own previous work or affiliations in the bibliographic citations must be in the third person.

For the blind review process, DO NOT LIST THE NAMES OR AFFILIATIONS OF ANY OF THE AUTHORS ANYWHERE ON THE MANUSCRIPT, except in the references section (if citation to prior work is required).
Example: Dutt and Hassoun presented a method for listing self-referential citations in [5].?[5] P. N. Dutt and S. Hassoun, How to write a research DAC paper, 2010. (Available at *www.dac.com)
*link for example purposes only

Q. I submitted a longer version of my manuscript to another conference/journal. Can I still submit it to DAC?

A. DAC adheres to strict rules regarding double submissions. Your submissions must be clearly distinct. Use your judgment. If in doubt, consult with a more senior colleague. Double submissions are considered unethical, and a serious issue within IEEE and ACM.

Q. What makes a good DAC manuscript?

DAC Electronic Design Automation (EDA) Research Manuscripts have at their core novel algorithms or novel algorithm implementations for important problems facing leading edge electronic design automation. These may address the problem at any level of abstraction (from high-level blocks down to the bare transistor). They can cover both design implementation (for example, physical layout or logic synthesis) and design analysis (for example, signal integrity analysis, rule checking, functional verification, and circuit simulation).
DAC Embedded Systems and Software (ESS) Manuscripts will cover novel advances in embedded systems software and hardware, from the very highest levels of system specification (e.g., domain-specific languages and model based design) to hardware/software implementations of embedded systems, their associated software design tools and architectural platforms, as well as validation, verification, and security. ESS topics will also cover modeling, optimization, and exploration of multiple embedded system constraints (e.g., reliability, power, security). ESS case studies, platforms and design methodologies are also an integral part of these topics.
Design Automation Methodology Manuscripts and Design Manuscripts must be submitted as User Track extended abstract. Please refer to the User Track call for contributions and submission guidelines. The submission and review process for User Track will be treated separately to encourage the design community to participate at DAC.

Q. I checked the box for a WIP presentation if my manuscript is not accepted as research manuscript. What does it mean?

A. If the TPC does not accept your manuscript as a research manuscript, they will decide if your paper meets the requirements as Work-in-Progress. In this case you will be invited to present during a specific poster sessions at DAC, but the manuscript will not be published in the DAC proceedings. Please see the Work-in-Progress section in the Call for Contributions for more details.

Q. Do you have a sample of a research manuscript to reference?

A. Yes, Please go to the DAC Archives for previously accepted submissions.

Q. How many pages of the manuscript will be included in the DAC proceedings?

A. DAC will publish up to 10 pages of an accepted manuscript.

Q. I still have some questions. Who do I contact?

A. For additional information, please contact Donatella Sciuto or Chuck Alpert, 50th DAC Technical Program Co-Chairs.

ABSTRACT SUBMISSION
-CLOSED-
November 27, 2012

MANUSCRIPT SUBMISSION -CLOSED-
December 3, 2012

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IMPORTANT COPYRIGHT FORM INFORMATION:
All papers that are submitted to DAC for publication in the official conference proceedings will be required by ACM to sign a copyright form. A sample copy of the ACM Copyright form can be found here so that authors can get the approval process started with their organizations. This copyright sample is for your information only. Authors will be required to complete an electronic version of this form through the ACM submission system in February if their paper is accepted.

Please note: Paper forms are no longer accepted and ACM will not accept any addenda to this form.

Any issues/questions authors have regarding the copyright form or ACM Policy may be addressed to RightsReview@acm.org.