ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)
Sunday, June 2, 2013
Time: 8:00 AM — 6:00 PM
|Organizers: ||Mustafa Ozdal - Intel Corp., OR|
| ||Rasit Topaloglu - IBM Corp., Fishkill, NY|
| ||Sung Kyu Lim - Georgia Institute of Technology, Atlanta, GA|
| ||Baris Taskin - Drexel Univ., Philadelphia, PA|
| ||Tsung-Yi Ho - National Cheng Kung Univ., Tainan City, Taiwan|
| ||Zhuo Li - IBM Research - Austin, TX|
The general technical scope of the workshop is the design, analysis and prediction of interconnect and communication fabrics in electronic systems. The workshop themes include keynote speech, regular paper sessions with paper discussion panels, interactive poster sessions, panels on hot research topics, and embedded tutorials and invited talks.
Representative technical topics include, but are not limited to: interconnect prediction and optimization at various IC design stages, interconnect design challenges and system-level NoC design, design and analysis of power and clock networks, interconnect architecture of structural designs and FPGAs, interconnect fabrics of many-core architectures, design-for-manufacturing (DFM) techniques for interconnects, high speed chip-to-chip interconnect design, design and analysis of chip-package interfaces, interconnect topologies of multiprocessor systems, 3D interconnect design and prediction, emerging interconnect technologies, sensor networks, and synergies between chip communication networks and networks arising in other contexts.
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