SESSION 3: DESIGNED IN TEXAS
Physical Design II
Tuesday, June 4, 2013
Time: 1:30 PM — 3:00 PM
|Moderator: ||Mehmet Yildiz - Synopsys, Inc., Austin, TX|
Designers from IBM, TI, and Vidatronic will talk about bridging the gap between synthesis and custom design, top-level closure, and low-dropout linear regulators.
Structured Soft Blocks: Bridging the gap between Custom and Synthesized Designs
It is well known that today's technology evolution is showing saturation in the area of circuit performance, while the capacity trend line remains healthy. As a result, design teams today are leveraging new technology nodes as a means to integrate larger amounts of function onto chips. As this trend line continues and design content grows, it is becoming increasingly difficult for processor designs to rely exclusively on heavy customization. Productivity methods are in demand, leading processor designs to more highly leverage physical synthesis methods mixed with custom design. Coming from the other end of the spectrum, many ASIC design teams are driving up the stack to higher performance points. These designs can benefit directly from selectively leveraging custom design methods that are more traditionally applied to processor chips. In both cases, there is a trend line driving a mix of custom and synthesized logic. In this talk I will present a design method that sits just at the line that segregates custom and synthesized circuit design. This method is called "structured soft block", or SSB. The SSB method brings the best of both words together into an integrated tools and methodology, allowing some of the key attributes of custom design to be seamlessly merged into the higher productivity physical synthesis method.
|Speaker: ||Paul Villarubia - IBM Corp., Austin, TX|
Rapid Fire – Top Level Closure, Texas Style
Top-level physical design of large complex SoCs can become an unacceptable schedule long pole if using “classic” methodology. RapidFire replaces two key classic methodology steps, placement optimization and CTS, with a simple, fast, and predictable in-house tool. This tool reduces our closure cycle from weeks to days, allowing dozens of top level iterations over the course of a project. Repeatability is improved such that closure cycles can continue until a few weeks prior to base tapeout. We will present the tool, how it fits in the flow, and QOR challenges of top level: flight delay, congestion, power, CTS.
|Speaker: ||Bob Sussman - Texas Instruments, Inc., Dallas, TX|
Low-Dropout (LDO) Linear Regulator: Tutorial and Product Examples
Low-dropout (LDO) linear regulators are an essential component for today's wireless and wired systems. This presentation will discuss background information and requirements for high performance low dropout (LDO) linear regulators both for embedded and discrete applications. The presentation will also discuss performance figures of merit (e.g. power supply rejection and load transient regulation) as well as design trade-offs for different architectures. Finally, the presentation will show some of the LDO products designed at Vidatronic.
|Speaker: ||Edgar Sanchez-Sinencio - VIDATRONIC, Inc., College Station, TX|