The Cadence System-to-Silicon Verification Breakfast
Tuesday, June 4, 2013
Time: 8:00 AM — 10:00 AM
Austin Convention Center, Fourth Floor, Ballrooms
Circuit and interconnect analysis
Austin Convention Center, Fourth Floor, Ballrooms E and F
Abstract: Join us for a free breakfast to learn how next-generation system and SoC verification offerings from Cadence accelerate your system integration and reduce time to market. Learn about the newest capabilities of the Cadence System Development Suite, including Virtual System Platform virtual prototyping, Incisive® advanced verification, Palladium® acceleration and emulation, Rapid Prototyping Platform FPGA-based prototyping, and the Verification IP catalog, which adds new communication protocols and now supports acceleration and emulation. Listen to discussion about the latest methodologies for advanced verification and example applications from key Cadence customers. Be sure to bring your toughest questions for our experts panel.