MONDAY TUTORIALS
Tutorial 7: Avoiding Core Meltdown! - Adaptive Techniques for Power and Thermal Management of Multi-Core Processors
Monday, June 3, 2013
Time: 11:00 AM — 1:00 PM
Location:
18C
Topic Area:
Low-Power Design and Power Analysis
| Organizer: | Ibrahim (Abe) Elfadel - Masdar Institute of Science and Technology, Abu Dhabi, United Arab Emirates |
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| Speakers: | Dr. Charles Lefurgy - IBM Research - Austin |
| | Sherief Reda - Brown Univ., Providence, RI |
| | Ayse Coskun - Boston Univ., Boston, MA |
Summary:
The objective of this embedded tutorial is to bring DAC attendees who are interested in low-power design for high-end, multi-core processors to the forefront of the latest academic research and industrial practice in the area of closed-loop control of power and temperature in multi-core processors.
The tutorial will assume the audience has no background in classical or modern control theory or techniques. It will use the power capping problem and the temperature emergency problem as vehicles for presenting the evolution of closed-loop power and thermal management techniques since the early 2000 until the present.
The tutorial will bring up issues pertinent to closed-loop control systems that are essential for the practical success of control techniques in the context of multi-core power/thermal management. These issues include adaptation to load variations, robustness with respect to power/thermal model uncertainty, response time, constraint satisfaction, and stability.
Although power/thermal management of multi-core chips presents some similarities with that of clusters and data centers, this tutorial will stress some of the major differences and outlines the challenging aspects of the multi-core case, especially in terms of scalability and per-core modeling and control.
Dr. Charles Lefurgy has been Research Staff Member in the IBM Austin Research Lab since September 2000, where he works in the Power-Aware Systems group to develop power-management solutions for servers. His other research interests include microarchitecture, memory systems and compilers. He is an IBM Master Inventor and his work has recently been awarded the Best Paper Award at MICRO’44 and 2011 Pat Goldberg Best Paper Award. Dr. Lefurgy holds a Ph.D. in computer engineering at the University of Michigan. His dissertation work focused on compressed memory systems for embedded computing.
Sherief Reda is an Associate Professor at the School of Engineering, Brown University.
His research interests are in the areas of energy-efficient computing systems, design automation and test of integrated circuits, and reconfigurable computing. Prof Reda received four best paper nominations and two best paper awards in DATE 2002 and ISLPED 2010. He is a recipient of a NSF CAREER award.
Ayse K. Coskun is an assistant professor in the Electrical and Computer Engineering Department at Boston University. She received her MS and PhD degrees in Computer Science and Engineering from University of California, San Diego. Coskun’s research interests are temperature and energy management, 3D stack architectures, computer architecture, and embedded systems. Prof. Coskun has worked at Sun Microsystems (now Oracle), San Diego prior to her current position at BU. She received the best paper award at IFIP/IEEE VLSI-SoC Conference in 2009 and at High Performance Embedded Computing (HPEC) Workshop in 2011, and she is a recipient of the NSF CAREER award. She has served as an associate editor for ACM Transactions on Design Automation of Electronic Systems and IEEE Embedded Systems Letters.