Tutorial 2: Methodology for Continuous 24x7 Verification and Coverage
Monday, June 3, 2013
Time: 2:00 PM — 4:00 PM
Verification and simulation
|Organizers: ||Avi Ziv - IBM Corp., Haifa, Israel|
| ||John Brennan - Cadence Design Systems, Inc., Chelmsford, MA|
|Speakers: ||Avi Ziv - IBM Corp., Haifa, Israel|
| ||Hemant Gupta - Cadence Design Systems, Inc., Noida, India|
The concept of continuous verification is the notion of ensuring that your verification engines, most normally your simulators, are always running and always executing jobs. The “always on” philosophy means that jobs are submitted to the simulation farm on a 24x7 basis, and that no engine is ever sitting idle.
Dr. Avi Ziv
One of the key technical enablers to this “always on” methodology, however, is a significant shift in coverage methodology. Specifically, coverage needs to support the notions of continuous data updates without having to worry so much about model changes. This may require putting more effort in the front end of the process (model definition), but it provides more capabilities at analysis time. The tutorial describes in detail the coverage aspects of the continuous verification methodology, discusses the challenges and benefits this approach provides, and explains how users might apply a similar approach in their own projects.
is a Research Staff Member in the Simulation-Based Verification Technologies department at the IBM Research Laboratory in Haifa. Since joining IBM in 1996, Avi has been working on developing technologies and methodologies for various topics of simulations-based functional verification including stimuli generation, checking, functional coverage and coverage directed generation. Avi is also involved in efforts to bridge the gap between pre-silicon verification and post-silicon validation.
Avi received the B.Sc. degree in Computer Engineering from the Technion–Israel Institute of Technology in 1990 and the M.Sc. and Ph.D. degrees in electrical engineering from Stanford University in 1992 and 1995, respectively.
is a software architect with Incisive Coverage team in Advanced Verification Systems group of Cadence Design Systems. He has nearly 15 years of experience in EDA with software simulators and metric driven verification tools. He is also an active member of Accellera UCIS committee.