CONVENED THURSDAY June 12, 4:30pm - 6:00pm | 208AB
TOPIC AREA: VERIFICATION AND TEST
SESSION 51
REGULAR SESSION: Advances in Verification of Abstract (pre-RTL) Models
Chair: Bhaskar J. Karmakar - Texas Instruments, Inc., Bangalore, India
An important direction in addressing current gaps in functional verification is raising the abstraction level of design entry. In this session, we will hear about advances in functional verification of these abstract SystemC/C++ models. The papers cover both simulation and formal verification techniques, with special focus on handling concurrency.
| 51.1 | Partial Order Reduction for Scalable Testing of SystemC TLM Designs | |
| Speaker: | Sudipta Kundu - Univ. of California, San Diego, CA |
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| Authors: | Sudipta Kundu - Univ. of California, San Diego, CA Malay Ganai - NEC Corp., Princeton, NJ Rajesh Gupta - Univ. of California, San Diego, CA |
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| 51.2 | Construction of Concrete Verification Models from C++ | |
| Speaker: | Malay Haldar - Calypto Design Systems, Inc., Noida, India |
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| Authors: | Malay Haldar - Calypto Design Systems, Inc., Noida, India Gagandeep Singh - Calypto Design Systems, Inc., Noida, India Saurabh Prabhakar - Calypto Design Systems, Inc., Noida, India Basant Dwivedi - Calypto Design Systems, Inc., Noida, India Antara Ghosh - Calypto Design Systems, Inc., Noida, India |
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| 51.3 | Predictive Runtime Verification of Multi-Processor SoCs in SystemC | |
| Speaker: | Alper Sen - Freescale Semiconductors, Inc., Austin, TX |
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| Authors: | Alper Sen - Freescale Semiconductors, Inc., Austin, TX Vinit Ogale - Univ. of Texas, Austin, TX Magdy Abadir - Freescale Semiconductors, Inc., Austin, TX |
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