DAC Archive

CONVENED THURSDAY July 30, 9:00am - 11:00am | Room 132



SESSION 8U
USER TRACK: Power Analysis and IP Reuse

Moderators:

Kyu-Myung Choi - Samsung, Yongin City, Gyeonggi-Do, Republic of Korea
Kaijian Shi - Synopsys, Inc., Dallas, TX



Accurate power supply and substrate noise analysis remains a challenge. Practitioners from Qualcomm, Inc., IBM Corp., Samsung and STARC will show how they attacked the problem. IP blocks need to be designed to be used in many different environments. Texas Instruments, Inc. shows how to analyze blocks for reuse in multiple metal stacks. Assessing a design feasibility early in the process can avoid many problems later. Intel Corp. shows their approach.

8U.1	Dynamic Power Analysis for Custom Macros Using ESP-CV
	Speaker:	Nadeem Eleyan - Qualcomm, Inc., Austin , TX
	Authors:	Stephen Bijansky - Qualcomm, Inc., Austin, TX Bassam Mohd - Qualcomm, Inc., Austin, TX Baker Mohammad - Qualcomm, Inc., Austin, TX Nadeem Eleyan - Qualcomm, Inc., Austin , TX
8U.2	Power Supply and Substrate Noise Analysis; Reference Tool Experience with Silicon Validation
	Speaker:	Makoto Nagata - Kobe Univ., Kobe, Japan
	Authors:	Yoji Bando - Kobe Univ., Kobe, Japan Daisuke Kosaka - The A-R-TEC Corp., Kobe, Japan Goichi Yokomizo - STARC, Yokohama, Japan Kunihiko Tsuboi - STARC, Yokohama, Japan Ying Shiun Li - Apache Design Solutions, Inc., San Jose, CA Shen Lin - Apache Design Solutions, Inc., San Jose, CA Makoto Nagata - Kobe Univ., Kobe, Japan
8U.3s	Modeling and Design Challenges for Multicore Power Supply Noise Analysis
	Speaker:	Ben Mashak - IBM Corp., Rochester, MN
	Authors:	Ben Mashak - IBM Corp., Rochester, MN Howard Chen - IBM Corp., Yorktown Hts., NY Bill Hovis - IBM Corp., Rochester, MN
8U.4s	Dynamic Power Noise Analysis Method for Memory Designs
	Speaker:	Chanseok Hwang - Samsung, Hwasung, Republic of Korea
	Author:	Chanseok Hwang - Samsung, Hwasung, Republic of Korea
8U.5s	Hard IP Reuse in Multiple Metal Systems SOCs
	Speaker:	Siva Kothamasu - Texas Instruments, Inc., Bangalore, India
	Authors:	Aish Dubey - Texas Instruments, Inc., Bangalore, India Dhanabal G - Texas Instruments, Inc., Bangalore, India Anurag Gupta - Freescale Semiconductor, Inc., Noida, India Siva Kothamasu - Texas Instruments, Inc., Bangalore, India
8U.6s	Di/dt Mitigation Method in Power Delivery Design and Analysis
	Speaker:	Thao N. Pham - Intel Corp., Folsom, CA
	Authors:	Julius Delino - Intel Corp., Folsom, CA Thao N. Pham - Intel Corp., Folsom, CA Farag Fattouh - Intel Corp., Folsom, CA