DAC 2010 ANAHEIM JUNE 13-18
Follow Us

DAC Archive

Presented by Mentor Graphics Corp.: Object Oriented Hardware Reuse with ANSI C+++ and Algorithmic Synthesis
MONDAY - June 09, 10:10am - 10:50am / Exhibit Hall D, Booth 2849

Presented by Mentor Graphics Corp.: What you Should Know about The Open Verification Methodology (OVM)
MONDAY - June 09, 10:50am - 11:30am / Exhibit Hall D, Booth 2849

Presented by Magma Design Automation: Titan™ Chip Finishing and Faster Analog Design Implementation/Migration
MONDAY - June 09, 2:00pm - 2:40pm / Exhibit Hall D, Booth 2849

Presented by Mentor Graphics Corp.: Mentor Graphics and Agilent Technologies Integrated RF Design Solution for PCBs
MONDAY - June 09, 2:40pm - 3:20pm / Exhibit Hall D, Booth 2849

Presented by Denali Software, Inc.: Key Ingredients of a Next-generation NAND Flash Platform
MONDAY - June 09, 3:20pm - 4:00pm / Exhibit Hall D, Booth 2849

Accellera Technical Committee Update and Technical Excellence Award
TUESDAY - June 10, 11:00am - 1:00pm / Exhibit Hall D, Booth2849

Presented by Mentor Graphics Corp.: 2-D and 3-D Variability Optimization
TUESDAY - June 10, 2:00pm - 2:40pm / Exhibit Hall D, Booth 2849

Presented by Mentor Graphics Corp.: Multi-Corner-Multi-Mode P&R for Timing, Power, and SI Closure
TUESDAY - June 10, 2:40pm - 3:20pm / Exhibit Hall D, Booth 2849

Presented by Blaze DFM, Inc.: Leakage Power Reduction using Electrical DFM Techniques (customer case study)
TUESDAY - June 10, 3:20pm - 4:00pm / Exhibit Hall D, Booth 2849

Presented by CoFluent Design: Early Decision Trade-off, Addressing Performance Concerns in Future Network Infrastructure
TUESDAY - June 10, 4:00pm - 4:30pm / Exhibit Hall D, Booth 2849

Presented by Pyxis Technology, Inc.: Pyxis High Performance Yield-Aware IC Router
WEDNESDAY - June 11, 9:15am - 9:55am / Exhibit Hall D, Booth 2849

Presented by Teklatech: IR Drop and Noise Aware SoC Floorplanning
WEDNESDAY - June 11, 9:55am - 10:35am / Exhibit Hall D, Booth 2849

Presented by Tela Innovations, Inc.: 45nm Leakage Reduction Using Gridded, One Dimensional Layout
WEDNESDAY - June 11, 10:35am - 11:15am / Exhibit Hall D, Booth 2849

Presented by Azuro, Inc.: Clock Implementation for Nanometer Chip Design
WEDNESDAY - June 11, 2:00pm - 2:40pm / Exhibit Hall D, Booth 2849

Presented by Synfora, Inc.: Architectural Exploration for Low Power Design using PICO Extreme
WEDNESDAY - June 11, 2:40pm - 3:20pm / Exhibit Hall D, Booth 2849

Presented by Sequence Design, Inc.: Design for Power
WEDNESDAY - June 11, 3:20pm - 4:00pm / Exhibit Hall D, Booth 2849

Best of DAC Award Winners
WEDNESDAY - June 11, 4:30pm - 5:00pm / Booth #2849

IEEE Solid State Circuits Society Electronic Design Automation Consortium CEDA - IEEE Council on Electronic Design Automation SIGDA Special Interest Group - Design Automation