DAC 2010
ANAHEIM JUNE 13-18
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46th DAC (2009)
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Pre-38th DAC
#1: Low-Power SOC Design: State of the Art and Directions
MONDAY - July 27,
8:30am - 4:30pm / Room: 133
#2: High-Level Synthesis for ESL Design: Fundamentals and Case Studies
MONDAY - July 27,
8:30am - 4:30pm / Room: 132
TECHNICAL PROGRAM
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Special Plenary Panel
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User Track
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WORKSHOPS & COLOCATED
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BY TOPIC AREA
Analog/Mixed-Signal/RF Design
Business
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Emerging Technologies
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Interconnect and Reliability
Low-Power Design
Physical Design
Synthesis and FPGA
System-Level and Embedded
Verification and Test
User Track
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