Atrenta Introduces Fast Lint for SpyGlass®
Jun 5, 2012
SAN FRANCISCO, Calif — June 4, 2012 — Atrenta Inc., a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries, announced today at the 49th Design Automation Conference (DAC) the availability of a Fast Lint methodology for its SpyGlass RTL analysis and optimization platform. The new capability is part of Atrenta’s GuideWare reference methodology, and tests on a wide range of designs have shown a 4X to 9X speed improvement while still delivering accurate, low noise results.
In addition to Fast Lint, the company will be demonstrating hierarchical analysis support, which abstracts design elements that have been pre-analyzed for higher (chip-level) analysis. This approach can deliver 5X to over an order-of-magnitude speed improvement for highly complex designs as compared to running flat (i.e., without hierarchy).
The SpyGlass linting solution analyzes a design at the register transfer level (RTL) of abstraction for coding styles and circuit constructs that can cause verification and implementation issues. Linting forms the base capability for the SpyGlass platform, which is also used widely for power optimization, clock synchronization verification (CDC), testability, constraints management and routing congestion analysis. Design groups use SpyGlass to verify that their design is ready to be handed off to back-end physical implementation tools. The Fast Lint methodology allows rapid feedback during the early stages of RTL development. It is also used by revision control systems before new code check-in occurs.
“Last year, we introduced Advanced Lint at DAC to provide a highly detailed and accurate linting analysis,” said Mike Gianfagna, vice president of marketing at Atrenta. “Our customers told us they also wanted a fast capability during early RTL development. We listened, and this year we are introducing Fast Lint to provide our customers with both speed and accuracy.”
Atrenta will be demonstrating the entire SpyGlass and GenSys® product families in booth 2230 at the Design Automation Conference here at the Moscone Center in San Francisco from June 4 to June 6, 2012. A new White Paper discussing linting methodology is also available from Atrenta and may be downloaded from the Resources area on the Atrenta web site.
Atrenta’s SpyGlass® Predictive Analysis software platform significantly improves design efficiency for the world’s leading semiconductor and consumer electronics companies. Patented solutions provide early design insight into the demanding performance, power and area requirements of the complex system on chips (SoCs) fueling today’s consumer electronics revolution. More than two hundred companies and thousands of design engineers worldwide rely on SpyGlass to reduce risk and cost before traditional EDA tools are deployed. SpyGlass functions like an interactive guidance system for design engineers and managers, finding the fastest and least expensive path to implementation for complex SoCs.
SpyGlass from Atrenta: Insight. Efficiency. Confidence. www.atrenta.com
© 2012 Atrenta Inc. All rights reserved. Atrenta, the Atrenta logo, SpyGlass and GenSys are registered trademarks of Atrenta Inc. All others are the property of their respective holders.
This press release contains forward-looking statements. Atrenta disclaims any obligation and does not undertake to update or revise the forward-looking statements in this press release.
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