SESSION 20: SKY TALKS
What a Chip Designer Needs at the End of Moore's Law
Tuesday, June 4, 2013
Time: 5:30 PM — 6:00 PM
|Moderator: ||Robert Jones - Intel Corp., OR|
|Speaker: ||Robert Colwell - Defense Advanced Research Projects Agency, Arlington, VA|
If a non-technical person looks around and sees the incredible array of highly complex, high capable silicon in the world today, they might reasonably conclude that most aspects of chip design have been mastered. After all, it's now been 20 years since the Pentium FDIV flaw. But chip engineers know better - there are aspects of chip design that have never been fully conquered, and some of them are about to get much worse. In this talk I'll explore what a chip designer of the relatively near future is going to need, to continue (at least for a few more years) the illusion that routine creation of these chips can be taken for granted.
Dr. Robert (Bob) Colwell
, Director MTO, joined the Microsystems Technology Office in April 2011 as the Deputy Director. His interests include architectural and hardware engineering, CPUs, chipsets, buses, memories, and electronics.
Before joining DARPA, Dr. Colwell worked as a consultant specializing in general computer HW/SW consulting to industry and academia. From 1990 – 2001, Dr. Colwell worked for the Intel Corporation and served as Chief Architect (IA32) responsible for all of Intel's Pentium CPU architecture efforts. He also initiated and led Intel's Pentium 4 CPU development. In 1997, Dr. Colwell was named an Intel Fellow, the highest technical grade at the company.
Dr. Colwell was a member of the technical staff at Bell Labs from 1977 to 1980, working on the BellMac series of microprocessors.
Dr. Colwell has been a recipient of the Eckert-Mauchly Award for “outstanding achievements in the design and implementation of industry-changing microarchitectures, and for significant contributions to the RISC/CISC architecture debate. In addition, Dr. Colwell was elected to IEEE Fellow and the National Academy of Engineering for “contributions to turning novel computer architecture concepts into viable, cutting-edge commercial processors.”
From 2006 – 2009, Dr. Colwell was selected as member of ISAT (Information Systems Advanced Technology) and co-chaired Machine Learning on Multicore in 2009. Having written over two dozen publications and one book, Dr. Colwell has been an invited speaker by DARPA, Google, and multiple universities. He is the inventor/co-inventor on 40 patents and is a recipient of the Carnegie-Mellon Distinguished Alumni Fellows Award and an Alumni Achievement Award from the University of Pittsburgh.
Dr. Colwell received a BSEE from the University of Pittsburgh, and both his MSEE and PhD from Carnegie-Mellon University.