SESSION 53: SKY TALKS
Fast & Furious: Taming the Challenges in Advanced-Node Design
Thursday, June 6, 2013
Time: 2:30 PM — 3:00 PM
|Moderator: ||Michael "Mac" McNamara - Adapt-IP, Palo Alto, CA|
|Speaker: ||Anirudh Devgan - Cadence Design Systems, Inc., Austin, TX|
As process technology marches relentlessly forward producing multi-billion-transistor integrated circuits, there is much discussion about best design techniques and power consumption strategies in the digital community. But, what does this mean for the custom and analog design worlds? Is 20nm the final frontier? How about 14nm? Are there insurmountable problems due to the exacting and power-hungry devices that make up the analog world? Well, the custom dinosaur isn’t extinct quite yet. Join this session to hear how circuit design, physical implementation, and verification are fusing into a new advanced-node methodology that copes with layout-dependent effects, complex interconnect rules, and lithography/colorization challenges so that custom and digital design can flourish together.
Dr. Anirudh Devgan
serves as the corporate vice president of the Silicon Signoff and Verification division at Cadence.
Prior to joining Cadence in 2012, Dr. Devgan spent seven years at Magma Design Automation as general manager and corporate vice president of Magma’s Custom Design Business Unit, leading the development and introduction of several successful products, including FineSim SPICE & FineSim Pro, SiliconSmart library and memory characterization, Titan analog design, QuickCap extraction & Quartz DRC/LVS. Prior to his experience at Magma, he spent 12 years at IBM in various management and technical positions at the IBM Thomas J. Watson Research Center, IBM Server Division, IBM Microelectronics Division and IBM Austin Research Lab, where he received numerous awards including the IBM Outstanding Innovation Award and IBM Outstanding Research Accomplishment.
In 2003, he was awarded IEEE/ACM William J. McCalla Award and ACM Design Automation Conference Best Paper Award in 2005. In 2006 Dr. Devgan was named an IEEE Fellow. He has also served on program committees for various international conferences including DAC, ICCAD, ASP-DAC, VLSI Design and ISQED. He has published more than 70 research papers and has 24 U.S. patents on various aspects of electronic design automation and circuit design.
Dr. Devgan received a bachelor of technology degree in electrical engineering from the Indian Institute of Technology, Delhi, and M.S. and Ph.D. degrees in electrical and computer engineering from Carnegie Mellon University.