Track 4, Part I - ESL and SystemC - The Definitive Guide to SystemC: The SystemC Language
Thursday, June 6, 2013
Time: 9:00 AM — 12:30 PM
System Level Design and Communication
|Organizer: ||Lori Sanine - Doulos, San Jose, CA|
|Speaker: ||David Black - Doulos, Austin, TX|
(Includes a 30-minute coffee break)
SystemC has become well-established as the language of choice for system modelling and virtual platform creation and integration, and is now being applied successfully for high level synthesis. SystemC models also frequently appear as reference models in the hardware verification flow.
This session will provide a solid introduction to the fundamental elements of the SystemC class library, aimed at hands-on hardware or software engineers who might know Verilog or C but have no previous experience of SystemC. This session will also present an overview of how SystemC is being used today in the contexts of system modelling, hardware synthesis, and hardware verification.
This track is taught by David C. Black, Doulos Senior Member, Technical Staff, who is co-author of the book,"SystemC: From the Ground Up."