1st Place $4,000
(session 41.1) AUnlocking the Design Secrets of a 2.29 Gb/s Rijndael Processor
Patrick R. Schaumont, Ingrid M. Verbauwhede, Henry Kuo - University of California, Los Angeles, CA

2nd Place $2,500
System Design of iBadge for Smart Kindergarten

Ivo Locher, Sung I. Park, Andreas Savvides, Mani Srivastava - Univ. of California, Los Angeles, CA

3rd Place (tie) $1,500
A Low Noise Switched-Capacitor Interface Electronics for Sub-micro Gravity Resolution Micromachined Accelerometers

Haluk Kulah - Univ. of Michigan, Ann Arbor, MI

3rd Place (tie) $1,500
Low-Jitter Power-Aware Non-PLL Clock Generator for GHz Microprocessors

Chulwoo Kim, Inchul Hwang - Univ. of Illinois, Urbana, IL
Sung Mo Kang - Univ. of California, Santa Cruz, CA


1st Place $4,000, SDC Best Paper $1000
A Microsystem for Near-Patient Accelerated Clotting Time Blood Tests

Steven M. Martin, Roy H. Olsson, Richard B. Brown - Univ. of Michigan, Ann Arbor, MI

2nd Place $2,500
Design of a Crossbar Switch Chip for Use in a Demonstration System of an Optoelectronic Multi-Chip Module

Jason D. Bakos, Donald M. Chiarulli - Univ. of Pittsburgh, Pittsburgh, PA

3rd Place $1,500
Highly Parallel DNA Sequence Matching and Alignment Processor

A. T. Patzer - Duke Univ., Durham, NC


A Low-Power Line Driver Using Resonant Charging With Reduced High-Order Frequency Components
Clemens Schlachta, Burkart Voss, Manfred Glesner - Darmstadt Univ., Darmstadt, Germany

(session 29.4) Systematic Design of a 200 Ms/s 8-bit Interpolating/Averaging A/D Converter
Jan Vandenbussche - Katholieke Univ., Leuven, Belgium

Power Minimization for Digital Optical Interconnects
Xiaoqing Wang, Fouad Kiamilev, Jeremy Ekman - Univ. of Delaware, Newark, DE