2023 TechTalk Speakers
Cloud But Not for Compute - A New Paradigm for Open IC Design
Transformative Technology Theater
Monday, July 10, 2023 | 10:30 am - 11:15 am
The advantages of cloud extend far beyond compute. Cloud enables secure collaboration at scale, and this is especially key for democratizing chip design. Cloud is the ideal platform for enabling open source reference designs in hardware, provide access to open-source/commercial tool suites, PDKs and everything else needed for end to end chip design. In this talk, you will hear about examples of entire communities leveraging an open platform for chip design, the rapidly evolving world of commercial chips based on open-source reference designs and inspirational success stories. The place where hardware and software developers, chip experts, students and researchers design, share, collaborate, fabricate and commercialize their own chips is here and NOW.
ABOUT: Mohamed Kassem is the CTO and Co-Founder of efabless.com, the first semiconductor company applying open community innovation to all aspects of product development. Prior to launching efabless in 2014, Mohamed held several technical and global leadership positions within Texas Instruments’ Wireless Business Unit.
Mohamed joined TI in 2000 at the beginning of the digital telephony revolution fueled by the unprecedented integration of major phone functions on a single SoC. He led the first development of 45nm, 28nm analog & mixed-signal IP functions for wireless applications processors.
Mohamed holds a Masters degree in Electrical Engineering from the University of Waterloo, Ontario, Canada and A Bachelors degree in Communications & Electronics from Ain Shams University, Cairo, Egypt
Building the Metaverse: Augmented Reality Applications and Integrated Circuits Challenges
DAC Pavilion, Second Floor
Monday, July 10, 2023 | 11:30 am - 12:30 pm
Augmented reality is a set of technologies that will fundamentally change the way we interact with our environment. It represents a merging of the physical and the digital worlds into a rich, context aware and accessible user interface delivered through a socially acceptable form factor such as eyeglasses. One of the biggest challenges in realizing a comprehensive AR experience are the performance and form factor requiring new custom silicon. Innovations are mandatory to manage power consumption constraints and ensure both adequate battery life and a physically comfortable thermal envelope. This presentation reviews Augmented Reality and Virtual Reality applications and Silicon challenges.
ABOUT: Edith Beigné is the Research Director of AR/VR Silicon at Meta Reality Labs where she leads research projects driving the future of AR devices. Her main research interests are low power digital and mixed-signal circuits and design with emerging technologies. Over the past 20 years, she has been focusing her research on low power and adaptive circuit techniques, exploiting new design techniques and advanced technology nodes for different applications ranging from high performance multi-processors to ultra-low power SoC, and, more recently, AR/VR applications. She is the Executive vice chair of ISSCC 2024, was the technical chair of ISSCC 2022 and part of ISSCC TPC since 2014, part of VLSI symposium TPC between 2015 and 2020. Distinguished Lecturer for the SSCS in 2016/2017, Women-in-Circuits Committee chair and JSSC Associate Editor since 2018. She visited Stanford University in 2018 to research on emerging technologies and new architectures.
Design Automation for Quantum Computing
DAC Pavilion, Second Floor
Monday, July 10, 2023 | 3:00 pm - 3:45 pm
Quantum computers have the potential to solve certain tasks that would take millennia to complete even with the fastest (conventional) supercomputer. Numerous quantum computing applications with a near-term perspective (e.g., for finance, chemistry, machine learning, optimization) and with a long-term perspective (i.e., cryptography, database search) are currently investigated.
The Design Automation Community needs to be ready for this! In fact, due to the radically different computational primitives, seemingly simple tasks in the design of corresponding computers and algorithms get substantially harder for quantum computing compared to conventional circuits and systems. This affects how we currently conduct design automation for quantum computing—or how we do not. In fact, established programming languages, synthesizers, design tools, test, or verification schemes do not work for quantum computers anymore. In many aspects, considering the design for quantum computers, we are back at square one. And this may lead to a situation where we may have quantum computers but no proper (automatic) methods that aid us in using their potential!
In this talk, we discuss how design automation can help and how we can get design automation experts excited for this emerging technology. To this end, we report from our long-standing expertise in this domain and our experiences on bridging the quantum computing and the EDA community. We illustrate that quantum computing is no "rocket science” and, using proper models and abstractions, design automation can make a huge difference. This is showcased by several methods and software tools which have been developed in the past years with design automation in mind. Finally, the integration of these methods, tools, and mindsets into entire ecosystems (covering the entire flow from applications to eventual realization) is presented.
ABOUT: Robert Wille is Full and Distinguished Professor at the Technical University of Munich, Germany, and Chief Scientific Officer at the Software Competence Center Hagenberg GmbH, Austria (a technology transfer company with more than 100 employees). For more than 15 years, he is working on topics in the domain of quantum computing and successfully established design automation concepts in this domain. The impact of his work is reflected by numerous awards such as Best Paper Awards, e.g., at TCAD and ICCAD, a DAC Under-40 Innovator Award, a Google Research Award, etc., collaborations with industrial partners in this domain, as well as his involvement in prestigious projects and initiatives, e.g., within the scheme of an ERC Consolidator Grant or the comprehensive quantum computing initiative of the Munich Quantum Valley.
DIY Orbital Tracking System for Space Communication: A Project to Contact the International Space Station
DAC Pavilion, Second Floor
Tuesday, July 11, 2023 | 11:30 am - 12:30 pm
Zeke Wheeler was 8 years-old when he asked his dad how he could call the astronauts on the International Space Station (ISS). This casual question resulted in a three-year epic STEM- learning adventure to contact the ISS, which included obtaining an FCC license to operate a radio, creating a satellite tracker using Legos, and researching, designing and building original circuit boards and antennas with his dad using Cadence Microwave Office. There have been trials as well as triumphs in this ongoing project of fortitude and resilience.
ABOUT: Zeke Wheeler is twelve years-old and demonstrated an early interest in engineering. In April he received the Best Presentation Award in the Multiphysics In-Design Analysis Track at CadenceLIVE 2023. Since 2020 he has been working to contact the International Space Station, using circuit boards and antennas designed in Microwave Office, and a satellite tracker made from Legos. He looks forward to sharing his project with the DAC community.
What ChatGPT and Generative AI means for Semiconductor Design and Development
DAC Pavilion, Second Floor
Wednesday, July 12, 2023 | 11:30 am - 12:30 pm
ChatGPT has generated a lot of excitement and speculation lately. People are asking how generative AI will affect us all. Questions around generative AI’s potential and limitations are top of mind.
This talk will touch on how AI/ML is helping in the semiconductor industry, and what generative AI can do for the chip design process. How it is likely to affect how we build chips, and what it could mean for semiconductor productivity.
ABOUT: Erik Berg is a Principal Engineer at Microsoft and an innovative leader in the field of SoC verification.
With a career that has been guided by the ambition to maximize the impact of everyone on his team, Erik brings a unique perspective to his work. He is driven by the challenge of scaling verification teams and reducing risk through methodology, tooling, and automation initiatives. As part of Erik's passion for pushing the boundaries of hardware development, he leads Microsoft's Steering Group for the application of machine learning and artificial intelligence in this domain.
One of Erik's notable contributions to the field is the invention of the Debug Decision Tree (DDT) tool. Recognizing the critical importance of debug efficiency, he developed DDT to enhance debug knowledge sharing and automation and collaborated with Synopsys to launch DDT to the market in 2023.
Before joining Microsoft, Erik spent 19 years at Intel, holding verification roles covering IP, SOC, formal, power, and performance. His extensive experience across different domains has provided him with a comprehensive understanding of the complexities involved in creating cutting-edge hardware solutions.
Beyond his professional achievements, Erik holds a PhD from the University of Michigan, specializing in nanofabrication and single electron transistors. His academic background reflects his commitment to staying at the forefront of technological advancements.
Revolutionizing EDA: The Power of AI, ML, and NLP
Tranformative Technology Theater, First Floor
Tuesday, July 11, 2023 | 10:30 am - 11:15 am
The integration of AI, ML, and NLP techniques in EDA has the potential to significantly improve the efficiency, innovation, and quality of electronic systems. Customers in the semiconductor and EDA industries can benefit from reduced design time, increased reliability, and enhanced performance. This talk will draw upon use cases and research that have shown the integration of AI, ML, and NLP techniques in EDA has led to significant improvements in design accuracy. For example, ML algorithms have been used to optimize routing in complex circuits, while NLP techniques have been used to extract relevant design information from textual specifications. The talk will cover the use of unsupervised, supervised, and reinforcement learning techniques and NLP techniques in EDA tools and workflows.
ABOUT: Majid Ahadi Dolatsara received the B.Sc. degree in electrical engineering from K. N. Toosi University of Technology, Tehran, Iran, in 2013, the M.Sc. degree in electrical engineering from Colorado State University, Fort Collins, CO, USA, in 2016, and the Ph.D. degree in electrical and computer engineering from Georgia Institute of Technology, Atlanta, GA, USA, in 2021. He has won the Richard B. Schulz best paper award in transactions on electromagnetic compatibility in 2022.
He is currently employed by Keysight Technologies, Calabasas, CA, USA, as a research and development software engineer, working on electronic design automation software. His research interests include development of numerical and machine learning algorithms for high performance simulation in the area of signal and power integrity.