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2019 Best Paper/Presentation Recipients

DAC BEST PAPER AWARD

Dreamplace: Deep Learning Toolkit-enabled GPU Acceleration for Modern VLSI Placement

Speaker:
Yibo Lin Univ. of Texas at Austin, TX

Authors:
Yibo Lin     Univ. of Texas at Austin, TX
Shounak Dhar     Univ. of Texas at Austin, TX
Wuxi Li      Univ. of Texas at Austin, TX
Haoxing Ren      NVIDIA Corp., Austin, TX
Brucek Khailany     NVIDIA Corp., Austin, TX
David Z. Pan      Univ. of Texas at Austin, TX

NOMINATED BEST PAPER CANDIDATES

LithoGAN: End-to-end Lithography Modeling with Generative Adversarial Networks

BRIC: Locality-based Encoding for Energy-Efficient Brain-Inspired Hyperdimensional Computing

A 1.17 TOPS-W, 150fps Accelerator for Multi-face Detection and Alignment

DREAMPlace: Deep Learning Toolkit-enabled GPU Acceleration for Modern VLSI Placement

Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Search

BEST PAPER AWARD COMMITTEE

Jörg Henkel (Chair), Karlsruhe Institute of Technology, Baden-Württemberg, Germany
Yao-Wen Chang, National Taiwan University, Taipei, Taiwan
Soonhoi Ha, Seoul National University, Seoul, South Korea
Ramesh Karri, New York University, New York City, NY
Laura Pozzi, USI Lugano, Switzerland
Dimitrios Soudris, National Technical University of Athens, Greece
Mircea Stan, University of Virginia, Charlottesville, VA
Sachin Sapatnekar, University of Minnesota, Minneapolis, MN

DESIGNER TRACK BEST PRESENTATION - EMBEDDED SYSTEMS & SOFTWARE

Clouds, Containers, and your Simulations & Virtual Platforms

Speaker:
Jakob Engblom Intel, Corp.Stockholm, Sweden

Authors:
Jakob Engblom Intel, Corp.Stockholm, Sweden

Glow as a Machine Learning Compiler for Heterogeneous Hardware

Speaker:
Jordan Fix Facebook, Menlo Park, CA

Authors:
Jordan Fix Facebook, Menlo Park, CA

DESIGNER TRACK BEST PRESENTATION - FRONT-END

Deadlock & Livelock Detection in Power Controllers Using Under-constrained Formal Testbench

Speaker:
Ipshita Tripathi Qualcomm India Pvt. Ltd. & Qualcomm Technologies, Inc., Noida, India

Authors:
Ipshita Tripathi     Qualcomm India Pvt. Ltd. & Qualcomm Technologies, Inc., Noida, India
Arumugam Velayoudame     Qualcomm India Pvt. Ltd. & Qualcomm Technologies, Inc., Bangalore, India
Rahul Gupta     Qualcomm India Pvt. Ltd. & Qualcomm Technologies, Inc., Noida, India
Vinay Garipelli      Qualcomm India Pvt. Ltd. & Qualcomm Technologies, Inc., Bangalore, India

Improving Design Performance Using Machine Learning in Synthesis

Speaker:
Gaurav K. Varshney Texas Instruments India Pvt. Ltd., Bangalore, India

Authors:
Gaurav K. Varshney Texas Instruments India Pvt. Ltd., Bangalore, India
Akshi Tomar Texas Instruments India Pvt. Ltd., Bangalore, India

DESIGNER TRACK BEST PRESENTATION - BACK-END

A Hybrid Clock Tree with Multi-Spine Using Automated Design Methodology For Low Cost and Low Power Complex LSIS

Speaker:
Takashi Hasegawa Sony LSI Design Inc., Atsugi, Japan

Authors:
Takashi Hasegawa     Sony LSI Design Inc., Atsugi, Japan
Maki Yajima      Sony LSI Design Inc., Atsugi, Japan
Makoto Fujiwara      Sony LSI Design Inc., Atsugi, Japan
Takanori Saeki     Sony LSI Design Inc., Atsugi, Japan

A Multi-Perspective Approach to IC Power Grid Development for 7NM Based Designs

Speaker:
Mahendrasing J. Patil Intel Technology India Pvt. Ltd, Bangalore, India

Authors:
Mahendrasing J. Patil      Intel Technology India Pvt. Ltd, Bangalore, India
Ravi Teja Susarla     Intel Technology India Pvt. Ltd, Bangalore, India
Surendra Boosam Kota      Intel Technology India Pvt. Ltd, Bangalore, India

IP TRACK BEST PRESENTATION

Memory Systems for AI and Leading-edge Applications

Speaker:
Steven Woo Rambus Inc., Sunnyvale, CA

Authors:
Steven Woo      Rambus Inc., Sunnyvale, CA
Sanjay Charagulla      Rambus Inc., Sunnyvale, CA
Frank Ferro      Rambus Inc., Sunnyvale, CA

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