2021 TechTalk Speakers

View the Entire 2021 Conference Program

Serge Leef, Program Manager, Defense Advanced Research Projects Agency (DARPA)

Serge LeefReimagining Digital Simulation

Monday, December 6, 2021 | 11:30 AM - 12:30 PM

In the last few decades, digital event-driven simulation has largely relied on underlying hardware for performance gains; core algorithms have not undergone truly transformative changes. Past efforts to accelerate simulation with special purpose hardware has repeatedly fallen behind the ever-improving performance of general-purpose computers, enabled by Moore’s Law. Emulation-based strategies have also reached a performance ceiling. We are now at the end of the road with Moore’s Law, and the time is right to fundamentally rethink simulation algorithms, methodologies, and computational strategies: considering hyperscaling, facilitated by the cloud, and advances in domain specific computing. This talk will examine the past and a possible future of simulation, a key technology enabler for advanced chip designs.


Mr. Serge Leef joined DARPA in August 2018 as a program manager in the Microsystems Technology Office (MTO). His research interests include computer architecture, chip design tools, simulation, synthesis, semiconductor intellectual property (IP), cyber-physical modeling, distributed systems, secure design flows, and supply chain management. He is also interested in the facilitation of startup ecosystems and business aspects of technology.

Neeraj Kaul, Vice PResident of Engineering, Digital Design Group, Synopsys

Neeraj Kaul Delivering Systemic Innovation to Power in the Era of SysMoore

Monday, December 6, 2021 | 3:00 PM - 4:00 PM

The SysMoore era is characterized by the widening gap between what is realized through classic Moore's Law scaling and massively increasing system complexity. The days of traditional System-on-a-chip complexity are giving way to systems-of-chips complexity, with the continued need for smaller, faster, and lower-power process nodes coupled with large-scale multi-die integration methodologies to coalesce new breeds of intelligence and compute, at scale. To enable such systems, we need to look beyond targeted but piece-meal innovation to something much broader and more able to deliver holistically and on a grander scale.

Systemic thinking coupled with systemic innovation is key to addressing both prevailing and future industry challenges and approaching them comprehensively is necessary to deliver the technological and productivity gains demanded to drive the next wave of transformative products.

This presentation will outline some of the myriad prevailing challenges facing designers in this era of SysMoore and the systemic innovations across the broad, silicon-to-software spectrum to address them. Join us to learn, how a combination of intelligent, autonomous, and analytics-driven design, is paving the way to reliable, autonomous, always-connected vehicles and how this hyper-integrated approach to innovation is being deployed to deliver the secure, AI-enabled, multi-die HPC compute systems of tomorrow. And much more!


Neeraj Kaul is the VP of R&D at Synopsys leading Physical Design R&D team and ICCII product and is a member of Platform R&D team. Neeraj has spent over 20 Years serving EDA industry in the areas of Physical Design and Implementation, Placement, Clock Synthesis, Floorplanning, Simulation, Timing , Optimization and Abstraction. Neeraj holds B.Tech from IIT, Delhi, Ph.D. from Vanderbilt University, both in Electrical Engineering. Neeraj has over 10 journal and conference publications and holds 4 US patents.

Michael Jackson, Corporate VP - Research & Development, Cadence Systems

Michael JacksonMore than Moore and Charting the Path Beyond 3nm

Tuesday, December 7, 2021 | 11:30 AM - 12:30 PM

For more than fifty years, the trend known as Moore’s Law has astutely predicted a doubling of transistor count every twenty-four months. As 3nm technology moves into production, process engineers are feverishly working to uphold Moore’s Law by further miniaturizing the next generation of semiconductor technology. Meanwhile, a second trend referred to as “More than Moore” was coined in 2010 to reflect the integration of diverse functions and subsystems in 2D SoCs and 2.5D and 3D packages. Today, the trends of Moore’s Law and “More than Moore” synergize to produce ever higher value systems.

Working together, advances in both process technology and electronic design automation (EDA) have driven fundamental evolutions behind these two important semiconductor trends. This talk will examine the amazing and innovative developments in EDA over the years, culminating in the era of 3DIC and Machine Learning-based EDA to chart the path to 3nm and More than Moore.


Michael Jackson joined Cadence in 2019 and is a Corporate Vice President of R&D in the Digital and Signoff Group where he leads Cadence’s electrical and physical signoff products. He joined Synopsys in 2002 and led engineering for their synthesis, test and physical design products and later led marketing, business development and strategy for Synopsys’ Design Group. Prior to joining Synopsys, he led engineering for Avant!'s physical design and simulation product lines and he also led the design technology group in Motorola's Semiconductor Products Sector. Michael earned a BS in Electrical Engineering from the University of Arizona and a Ph.D. in Electrical Engineering and Computer Sciences from the University of California at Berkeley.

Steve Roddy, VP, Machine Learning Group at Arm

Steve RoddyThe AI Hype Cycle is Over. Now What?

Wednesday, December 8, 2021 | 11:30 AM - 12:30 PM

The expectations around AI and ML have been enormous, which fueled investment and innovation as companies scrambled for scalable approaches to building and deploying AI and ML solutions. Experimentation, in both hardware and software, has been the order of the day:

- Ramping up the core technology to improve accuracy and take on more use cases.

- Experimenting with the technology (models and processors) to understand what was possible, what worked, what didn’t and why.

The exuberance of the moment, however, created some unintended consequences. Take, for example, a fully parameterized, complex Transformer network. In an analysis by Northeastern University, the 300 million parameter model took 300 tons of carbon to train. Since then, accuracy and efficiency have improved gradually. Today, as the shouting dies down, the biggest trend – one that is having profound effects in helping teams innovate – is around hardware. The days of general-purpose hardware anchoring AI and ML are quickly giving way to specialized compute that allows engineers to not only tune their solutions for accuracy and efficiency but deploy their solutions more effectively across the compute spectrum. Industry veteran Steve Roddy, head of AI and ML product for Arm, will describe how a new era of democratized design is accelerating innovation in AI and design teams who embrace are speeding ahead of the pack.


Steve began his career as an engineer in the 1980s, designing supercomputer processors. With over 20 years’ experience in the semiconductor IP business, at companies including Tensilica and Cadence, he holds patents in cell library architecture and analog design.