IP Track Presentation Submissions

The IP Track is targeted specifically at practitioners. Whether you are an EDA tool user, hardware designer, software engineer, IP provider, IP core user, application engineer, verification IP user, consultant, or an engineering manager, the IP Track is an ideal place to meet and share your experiences.

DAC IP Track brings IC designers, IP core designers, IP ecosystem providers, embedded software and system developers, automotive electronics engineers, security experts and engineering managers from across the globe. Hardware designers, software engineers, IP developers, application engineers, and managers/executives from AMD, ARM, Bosch, BMW, Cadence, Delphi, GM, Global Foundries, Huawei, IBM, Imagination, Infineon, Intel, Mercedes Benz, MediaTek, Mentor, NEC, NVIDIA, NXP, Qualcomm, Samsung, Silicon Labs, Synopsys, TI, Lattice, TSMC, Global Foundries, and other leading companies will present their experiences on effective design flows, methods, tool usage, as well as IP integration and software development practices. This year, IP Track will include presentations, poster sessions and a rich set of invited talks/panels to facilitate information exchange and interactions. It offers a unique opportunity to network with and learn from other industry experts about best practices and current trends. There is no better way to improve your “IP IQ” in such a short amount of time.

DAC IP Track is looking for presentation and poster submissions with timely topics and high quality contents targeting challenges, innovations and trends in IP architecture, design, integration, reuse, ecosystem, and verification IP. This includes the unique application requirements and challenges for advanced technologies, automotive, security, Machine Learning, and the Internet of Things.

(As a note for those unfamiliar with the term IP, or with the DAC’s use of this term: IPs are design building blocks that are integrated together to form an Integrated circuit. semiconductor chip companies license the design and manufacturing specification of such IP from its owner, and include the IP with their own additional design elements to create a complete integrated circuit (IC).)  


IP Track Submission Timeline

  • October 1, 2020: Submission site open.
  • January 20, 2021: Submission deadline
  • March 17, 2021: Notification - Accept as poster, accept as presentation, or reject notifications will be emailed to authors.
  • March 24, 2021: Accept/Reject Notification and Confirmation Forms Due - Accepted posters and presentations must submit a confirmation form.
  • May 15, 2021: Bio & Draft Slides Due - Submission deadline for draft of final posters and/or presentations and speaker bios (for full talks only). All material will be reviewed by Session Chairs.
  • May 22, 2021: Slide Feedback - Deadline for Session Chairs to communicate poster and slide presentation feedback to authors.
  • June 1, 2021: Final Slides and Video Due - Deadline for authors to submit final poster and/or presentation slides and video for the DAC archive.

SUBMISSION GUIDELINES

The following guidelines should be followed when preparing your slides for submission:

  • Submissions are limited to 6 total slides*.
  • Submissions must be in PowerPoint format: 16:9 aspect ratio.
  • Consistent with DAC policy, company logos may appear only on the title slide.
    • Slide 1: Title, author names and affiliations
      • Authors may NOT be added after acceptance, so be sure to list all authors in the initial submission.
    • Slide 2: Motivation
      • Include an introduction that specifies the context and motivation of the submission. Examples: identify challenges associated with the design task at hand, clarify where in the design process the tools are used, and explain why the problem addressed is of interest to the audience.
    • Slide 3: Main Idea
      • Include details on the specific contributions of your work. Examples: innovative use of tools to achieve a specific goal, user enhancements to the tool and/or tool flow, dealing with scalability, details of integrating IP, study of design trade-offs, interfacing with manufacturing.
    • Slide 4: Additional Content Slide
      • Flexibility to add a slide that demonstrates value of the paper/idea
    • Slide 5: Evidence
    • Slide 6: Summary
      • Include a summary that highlights the main results of your work. Results are needed to evaluate the impact of your contribution. Metrics that could be used include productivity enhancement, improved quality of silicon, decreased complexity, and reduced time-to-market.
  • Important: Ensure that you have the necessary legal, trademark, copyright, and/or organizational approval needed to submit your presentation. Take appropriate steps to get this approval early, as the submissions deadline cannot be extended.

*Note: The presentation format described above is what is required for your submission to be reviewed by the Technical Program committee to decide Accept/Reject. The final presentation delivered at DAC will be made up of a Title slide, Author slide and 12 content slides. The expectation is that the final presentation will expand on the submission presentation.

FREQUENTLY ASKED QUESTIONS

What is the IP Track submission process?

To spare experts from industry the many hours of preparation associated with a regular manuscript submission, IP Track submissions are in the form of a 6-slide PowerPoint presentation. Authors of the highest quality submissions will be invited to present their work in IP Track sessions at the conference and a poster on the same subject during a IPTrack poster session. Other authors may also be invited to present a poster during a IP Track poster session.

Why a IP Track? How is it different from the Research Track?

The IP Track is intended specifically for design engineers. Whether you are an EDA tool user, hardware or software designer, application engineer, engineering manager, or a consultant, the IP Track is an ideal place to meet and share your experiences. This complements DAC’s strong research focus on algorithms and methodology. The IP Track aims to illustrate benefits and challenges of EDA tool usage, the process of creating successful hardware and software products and/or IP, and to provide educational and networking benefits for both end-users and tool developers. Naturally, the topics cut across hardware (GPU/CPU/SOC/ASIC/FPGA/Memory) and software design, IP and automation, given the rise of highly integrated systems in today’s design projects.

The IP Track is intended specifically for practitioners. Whether you are an EDA tool user, hardware or software designer, application engineer, engineering manager, or a consultant, the IP Track is an ideal place to meet and share your experiences.

What is the IP Track submission timeline?

  • October 1, 2020: Submission site open.
  • January 20, 2021: Submission deadline
  • March 10, 2021: Notification - Accept as poster, accept as presentation, or reject notifications will be emailed to authors.
  • March 18, 2021: Confirmation Forms Due - Accepted posters and presentations must submit a confirmation form.
  • May 15, 2021: Bio & Draft Slides Due - Submission deadline for draft of final posters and/or presentations and speaker bios (for full talks only). All material will be reviewed by Session Chairs.
  • May 22, 2021: Slide Feedback - Deadline for Session Chairs to communicate poster and slide presentation feedback to authors.
  • June 1, 2021: Final Slides and Video Due - Deadline for authors to submit final poster and/or presentation slides and video for the DAC archive.

For more information, please visit the IP Track Speaker Resource Center.

Are IP Track presentations and posters included in the DAC Proceedings?

No. However, IP Track posters and/or presentation slides will be made available online if the authors give permission. They will be made available on the DAC website after the conference as a part of the DAC Archive.

What kind of submissions from EDA companies make successful IP Track submissions?

The IP Track provides an EDA vendor-agnostic and objective forum for designers, IP developers and EDA tool users. To this end, IPTrack submissions that are essentially marketing material from any company will be rejected. On the other hand, joint customer/vendor submissions written from the perspective of the designer/developer are encouraged and are a valuable part of the IP Track.

Can I see some examples of good IP Track presentations?

Sure! Links to example slide presentations from previous years can be found in the DAC Archive.

Do I have to use a DAC template for my extended abstract?

No. But you are required to follow the submission and formatting guidelines provided on the IP Track webpage on the DAC website.

May I add an additional author(s) after submission?

No. All authors should be included at submission.

My company’s legal department hasn’t approved my submission yet. Can the deadline be extended?

No. While we sympathize with your situation (many of us have been there), we have a tight schedule and are unable to accommodate late submissions. If your company permits, you may submit your work for review by the DAC technical program committee without such approval. However, you must obtain appropriate legal, copyright, and any other required permissions well-ahead of the deadline for submission of the final presentation and/or poster, if your submission is accepted for presentation in either format. You will not be able to present any work at the IP Track without suitable permission from your company.

Where do I submit?

All submissions will occur electronically through the DAC website. The submission deadline was January 22, 2021 at 5pm MT (USA).

What does a IP Track presentation entail?

Authors of accepted presentations will be allocated 15 minutes in a IP Track session: 13 minutes for the presentation, 1 minute for wrap-up, and 1 minute for Q/A. In addition, presenters are required to present a poster describing their work (see below for poster guidelines) at one of the hour-long IP Track poster sessions and be available for the entire hour to discuss their work with interested attendees. This provides an opportunity for extended discussion with interested members of the audience.

New for 2021: All accepted presentations are expected to submit a video of their presentation in advance of the event. This does not replace participation in the event. At least one author must attend and present at the live event.

What does a IP Track poster entail?

Each author is allocated a 42” tall x 36” wide area for a poster. IP Track poster sessions will run for one hour, and may include 20-30 posters. Poster authors are welcome to distribute additional material to interested attendees at the poster session. Such material can include extended abstracts and whitepapers.

New for 2021: All accepted posters are expected to submit a video of their presentation in advance of the event. This does not replace participation in the event. At least one author must attend and present at the live event.

Please visit the Designer, Embedded Systems and IP Track Poster-Only Presenter Resource Center for more information on presenting during a poster-only session.

What’s the difference between a IP Track poster and a IP Track presentation?

IPTrack presentations are oral presentations similar to those in the DAC research track. IP Track presentations are scheduled in sessions that run parallel to the rest of the DAC program and also include a poster presentation at a IP Track poster session at the end of the day. If you are selected for a full presentation, you must produce both a slide presentation and a poster for post-session questions and discussion.
IP Track poster-only presentations must only produce a poster that will be presented during a poster-only session to be held at the end of the day on the exhibit floor for maximum exposure and discussion.

Visit the Poster-Only Presenter Resource Center for questions regarding the production of your poster.

What topics are appropriate for the IP Track?

We seek a wide variety of contributions from system engineers, hardware designers, IP developers, systems and software developers, application engineers, automotive electronics developers, security experts, IoT experts, and EDA vendor/customer teams. Documented EDA tool use may target electronic design and system design at all levels of abstraction and across all application domains. EDA tool marketing material is strongly discouraged and will be rejected.

How are IP Track submissions evaluated?


The IP Track program committee consists of industry experts that collectively represent years of design and software development experience. A good IP Track presentation addresses innovative tool use coupled with high-quality results. Extra notes are encouraged to be included in the submission. The considerations used by the program committee in acceptance decisions include:

  • Significance of results supported by clear, measurable criteria, including, but not limited to: improved quality of silicon, improved reuse, decreased design process complexity, and reduced time-to-market.
  • Level of innovation in tool use, e.g., utilizing one tool to obtain results that aid another tool, writing scripts to combine tools, user-facing enhancements, intelligent data management. A submission should not mirror the help section in the tool's user manual, but instead address a creative way of using the tool.
  • Ability to overcome design challenges such as scalability, integrating IP, and bridging front-end/back-end gaps.
  • Validation of the proposed techniques using real designs, case studies, or established benchmarks.
  • Discussion of the conceptual limitations of tools and suggestions for future tool improvement. Solid technical contributions should address both the strengths and the weaknesses of the approach.
  • Quality of material including writing, illustrations, and organization.
  • Product marketing material is inappropriate for the IP Track.

Does the IP Track have a “Best of” award?

Yes! Best Presentation awards will be selected from the IP Track. The awards will be based on (a) the quality of the submission, (b) the presentation given at DAC, and (c) the presentation at the poster session. The final selection will be made at the conference by an award committee. The Best Presentation Award will be announced in the DAC general session.

Do IP Track participants have to register for DAC?

Full DAC conference registrants are automatically allowed to attend the IPTrack. In addition, both IP Track speakers and any participants who want to attend only the Designer Track sessions, Keynotes, and the Exhibit Floor at DAC can do so at a discounted registration rate via the “IP Special”  registration package. Please see the DAC registration page for more details.

What should my slide presentation look like?

Remember that your slides must be presented in 13 minutes, plus 1 minute for wrap-up. Presenting meaningful content in a short time is challenging and requires careful thought and planning. Guidelines for preparing your final presentation are provided in the IP Track Speaker Resource Center. Example presentations from previous years can also be found in the DAC Archives.

My question isn’t answered here! Where can I get an answer?

Please address any unanswered questions to Randy Fish 58th DAC IP Track Chair.

IP Track submissions may describe the overall design and/or application of tools for creating the hardware, IP and/or software components of a novel electronic system. We specifically seek contributions from system engineers, hardware designers, application engineers, and vendor/customer teams. Documented tool use may target electronic design and system design at all levels of abstraction and across all application domains. Regular submissions will be accepted in the following categories:

  • IP.01 IP Provider CPU / GPU / DSP
  • IP.02 IP Provider Memory Controller / NOC
  • IP.03 IP Provider Communications IP
  • IP.04 IP Provider Analog / PHY / High speed interfaces
  • IP.05 IP Provider Embedded Software
  • IP.06 IP Provider Configurable IP / IP Compilers
  • IP.07 IP sub-systems / Multi-discipline IP / Programmable logic IP
  • IP.08 IP optimized for emerging markets and applications such as Automotive, IoT, Mobility, Networking, Cloud, Security, Resilience, Etc.
  • IP.09 IP Management / Assembly / Strategy / Roadmap
  • IP.10 IP Verification / Validation

ADDITIONAL INFORMATION

  • Accepted IP Track presentations and posters are NOT included in the DAC proceedings. However, accepted IP Track submissions (both posters and presentation slides) will be made available on the DAC website after the conference as a part of the DAC Archives (subject to approval from the authors).
  • IP Track submission will be accepted as a 15-minute presentation or presented as a poster in a 60-minute group session.
  • Best Presentation awards will be selected from the IP Track submissions. The awards will be based on (a) the quality of the submission, (b) the presentation given at DAC, and (c) the presentation at the poster session.