AVX Timing Side-Channel Attacks against Address Space Layout Randomization
Rethinking AIG Resynthesis in Parallel
Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks
COSA: Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion Methodologies
RL-CCD: Concurrent Clock and Data Optimization using Attention-Based Self-Supervised Reinforcement Learning
Theo Drane | Intel
Fulung Li | Intel
Seungjae Moon | HyperAccel
Lukas Juenger | MachineWare GmbH
June 23-27, 2024
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